Raspberry Pi Pico series
Raspberry Pi‘s first-party documentation for the Pico microcontroller boards — T1, and overdue here: the Pico is referenced on four pages of this wiki (microcontroller, embedded-systems, awesome-iot, the-open-book-ereader) and had no page of its own.
The two generations
| Pico 1 (RP2040) | Pico 2 (RP2350) | |
|---|---|---|
| Cores | dual-core Arm Cortex-M0+ | dual-core Arm Cortex-M33 or dual-core Hazard3 RISC-V |
| Clock | up to 133 MHz | up to 150 MHz |
| SRAM | 264 kB | 520 kB |
| On-board flash | 2 MB | 4 MB |
| PIO state machines | eight | twelve |
Both generations expose 26 multi-function GPIO, two SPI, two I²C, two UART, three 12-bit ADC channels and 16 PWM channels. The Pico 2 claims “hardware and software compatibility with Raspberry Pi Pico 1” and adds two timers with four alarms plus an always-on timer.
Wireless variants (Pico W, Pico 2 W) add Wi-Fi 802.11n and Bluetooth 5.2, with WPA3 and a soft access point “supporting up to four clients” — a number worth keeping, because it bounds what the on-board radio can be used for without an external AP.
Two things here are unusual
The chip boots two instruction sets. RP2350 offers “dual-core Arm Cortex-M33” or “dual-core Hazard3 RISC-V processor” — the same silicon, a choice of architecture. This spoke’s standing observation is that the field’s fragmentation gets absorbed rather than argued about, and zephyr was the example: one kernel across a dozen architectures, the board expressed as devicetree data. RP2350 does it a layer lower — the silicon absorbs the ISA question, so Arm-versus-RISC-V stops being a board-selection decision.
PIO is the real differentiator, and it grew. Eight programmable I/O state machines became twelve. PIO lets the chip synthesise timing-exact protocols the peripherals do not implement — the general answer to “this device speaks something my MCU has no controller for,” done in hardware rather than by bit-banging on the CPU. That is why the part appears under DIY builds across this wiki rather than being one MCU among many.
The product matrix is mostly about assembly
Strip the wireless option and the remaining variants — Pico H, Pico WH, “Pico 2 with headers” — differ from their base models in exactly two ways: presoldered pin headers, and a keyed three-pin JST-style debug connector in place of castellated through-hole pads.
That is a vendor selling hand-assembly convenience as a SKU, and it lands on the axis this wiki opened the same day with flopperziro and flipper-zero-diy: the cost that decides whether a design gets rebuilt is often soldering, not silicon. Raspberry Pi has priced that directly. The castellated edges on the base model point the other way — they exist so the module can be reflow-soldered into someone else’s board, which is the same part serving the professional integration path.
Standing caveat
First-party documentation: authoritative for what is offered, silent on anything comparative. No power figures, no achieved throughput, no comparison against ESP32 or STM32 — the parts a buyer actually chooses between. This spoke’s open question about vendor specs being unmeasured applies here as it does to up-wcl-wildcat-lake-sbc‘s TOPS claims.
Related
microcontroller · embedded-systems · open-hardware · the-open-book-ereader · iot-protocols · zephyr · awesome-iot · raspberry-pi · flopperziro